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Device Investigation of Nanoplate Transistor With Spacer Materials.

Authors :
Ko, Hyungwoo
Kang, Myounggon
Jeon, Jongwook
Shin, Hyungcheol
Source :
IEEE Transactions on Electron Devices. Jan2019, Vol. 66 Issue 1, p766-770. 5p.
Publication Year :
2019

Abstract

In this paper, a comparison of gate-all-around nanowire-FETs, nanoplate (NP)-FETs, and FinFETs was undertaken for the same areas of not only the gate metal but also the silicon channel, assuming the same conditions regarding the parasitic components. It is known that an NP-FET structure not only improves the delay performance but also enhances the immunity to short-channel effects. In addition, it is found that the use of a dual-k spacer with an NP-FET further improves the on-state as well as the off-state performances. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189383
Volume :
66
Issue :
1
Database :
Academic Search Index
Journal :
IEEE Transactions on Electron Devices
Publication Type :
Academic Journal
Accession number :
137215184
Full Text :
https://doi.org/10.1109/TED.2018.2880966