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A Line Tunneling Field-Effect Transistor Based on Misaligned Core–Shell Gate Architecture in Emerging Nanotube FETs.

Authors :
Musalgaonkar, Gaurav
Sahay, Shubham
Saxena, Raghvendra Sahai
Kumar, Mamidala Jagadesh
Source :
IEEE Transactions on Electron Devices. Jun2019, Vol. 66 Issue 6, p2809-2816. 8p.
Publication Year :
2019

Abstract

In this paper, a new architecture based on an intentional misalignment between the core and shell gate is presented for the nanotube tunnel field-effect transistor (NT-TFET). The misaligned core gate overlaps with the source region and facilitates line tunneling in the core-gate–source overlapped region significantly increasing the band-to-band tunneling (BTBT) rate. Using the calibrated 3-D simulations, we show that the proposed misaligned (MG) NT-TFET outperforms the conventional NT-TFET both in terms of static as well as dynamic performance. The MGNT-TFET exhibits an increased ON-state current by nearly 11 times as compared to the conventional NT-TFET with an ultrasteep subthreshold slope (minimum point subthreshold swing of ~5 mV/dec and an average subthreshold slope of 15.5 mV/dec). The higher effective drive current also leads to an improved dynamic performance in the MGNT-TFET [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189383
Volume :
66
Issue :
6
Database :
Academic Search Index
Journal :
IEEE Transactions on Electron Devices
Publication Type :
Academic Journal
Accession number :
137270835
Full Text :
https://doi.org/10.1109/TED.2019.2910156