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System-on-a-Chip (SoC)-Based Hardware Acceleration for an Online Sequential Extreme Learning Machine (OS-ELM).

Authors :
Safaei, Amin
Wu, Q. M. Jonathan
Akilan, Thangarajah
Yang, Yimin
Source :
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Nov2019, Vol. 38 Issue 11, p2127-2138. 12p.
Publication Year :
2019

Abstract

Machine learning algorithms such as those for object classification in images, video content analysis, and human action recognition are used to extract meaningful information from data recorded by image sensors and cameras. Among the existing machine learning algorithms for such purposes, extreme learning machines (ELMs) and online sequential ELMs (OS-ELMs) are well known for their computational efficiency and performance when processing large datasets. The latter approach was derived from the ELM approach and optimized for real-time application. However, OS-ELM classifiers are computationally demanding, and the existing state-of-the-art computing platforms are not efficient enough for embedded systems, especially for applications with strict requirements in terms of low power consumption, high throughput, and low latency. This paper presents the implementation of an ELM/OS-ELM in a customized system-on-a-chip field-programmable gate array-based architecture to ensure efficient hardware acceleration. The acceleration process comprises parallel extraction, deep pipelining, and efficient shared memory communication. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
02780070
Volume :
38
Issue :
11
Database :
Academic Search Index
Journal :
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems
Publication Type :
Academic Journal
Accession number :
139229577
Full Text :
https://doi.org/10.1109/TCAD.2018.2878162