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Simultaneous Common-Mode Voltage Reduction and Neutral-Point Voltage Balance Scheme for the Quasi-Z-Source Three-Level T-Type Inverter.

Authors :
Qin, Changwei
Zhang, Chenghui
Xing, Xiangyang
Li, Xiaoyan
Chen, Alian
Zhang, Guangxian
Source :
IEEE Transactions on Industrial Electronics. Mar2020, Vol. 67 Issue 3, p1956-1967. 12p.
Publication Year :
2020

Abstract

The conventional three-level inverter only has voltage buck capability. The quasi-Z-source three-level T-type inverter (QZS 3LT $^2$ I) has been proposed to realize voltage buck–boost operation. In this paper, we further propose a novel modulation scheme for the QZS 3LT $^2$ I to realize voltage boosting, reduce the common-mode voltage (CMV), and control the neutral-point voltage balance simultaneously. The proposed scheme adopts a large vector, a medium vector, a small vector with low CMV magnitude, a zero vector, and a shoot-through vector to generate the output voltage. According to sector number and neutral-point voltage difference, a p-type or n-type small vector with low CMV magnitude is properly selected to balance the neutral-point voltage. Shoot-through states are inserted within zero vector to boost the dc input voltage without affecting the ac output voltage. Dwell times of basic vectors are calculated through the revised volt–second balance equation. Furthermore, a coordinate control strategy between neutral-point voltage balance and voltage boosting is proposed. Doing so, the CMV magnitude can be restricted within one-sixth of dc-link voltage and neutral-point voltage imbalance can be effectively mitigated. The effectiveness of the proposed scheme is verified by simulations and experiments. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
02780046
Volume :
67
Issue :
3
Database :
Academic Search Index
Journal :
IEEE Transactions on Industrial Electronics
Publication Type :
Academic Journal
Accession number :
139500102
Full Text :
https://doi.org/10.1109/TIE.2019.2907501