Zero-Sequence Voltage Elimination for Dual-Fed Common DC-Link Open-End Winding PMSM High-Speed Starter–Generator—Part I: Modulation.

In this paper, a dual-fed (DF) common dc-link topology open-end winding permanent magnet synchronous motor for aircraft high-speed starter–generator application is considered. While on one hand the common dc bus configuration significantly simplifies and reduces the costs of the topology, on the other hand it allows the zero-sequence current (ZSC) to flow freely in the system. High-speed machines are characterized by low phase inductance, which implies low zero-sequence impedance. A small time constant of the zero-sequence circuit produces a high-frequency, high-intensity ZSC ripple with the risk of harming the switching devices. This paper presents a novel hybrid space vector pulsewidth modulation that allows to instantaneously eliminate the zero-sequence voltage (ZSV) produced by the two voltage source converters (VSCs) by square wave modulating one of the two VSCs. The non-sinusoidal machine back electromotive force (EMF) has been considered and the effect of the converters’ dead time on the ZSV has been analyzed. The square-wave-modulated VSC uses insulated-gate bipolar transistor (IGBT) devices, whereas the other uses Silicon Carbide (SiC) technology. The proposed topology is tested through both simulations and experiments. [ABSTRACT FROM AUTHOR]