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Realization of 2-D Separable-Denominator Digital Filters for Real-Time and Parallel Processing.

Authors :
Hinamoto, Takao
Muneyasu, Mitsuji
Source :
Electronics & Communications in Japan, Part 3: Fundamental Electronic Science. Aug91, Vol. 74 Issue 8, p71-79. 9p.
Publication Year :
1991

Abstract

This paper considers the 2-fl separable-denominator digital filter, and discusses its real-time and parallel-processing-oriented realization. The aim of this paper is to employ a large number th processors concurrently, and to realize a real-time processing minimizing the data throughput delay by applying pipeline processing. More precisely, the case where the poles of the 2-D separable- denominator transfer function are composed of real and complex poles is considered, and two new methods of realization are presented based on the Roesser-type local state-space model, which is suited to the real-time processing. It is shown that the data throughput delay in those methods is equal to the time for two multiplications and one addition, or the time for one multiplication and two additions. The processor factor and the efficiency in each realization are investigated, and the effectiveness of the realization methods are verified from the viewpoints of real-time processing and paralle processing. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
10420967
Volume :
74
Issue :
8
Database :
Academic Search Index
Journal :
Electronics & Communications in Japan, Part 3: Fundamental Electronic Science
Publication Type :
Academic Journal
Accession number :
14005065
Full Text :
https://doi.org/10.1002/ecjc.4430740808