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In-Depth Analysis of Pole-Zero Compensations in CMOS Operational Transconductance Amplifiers.
- Source :
-
IEEE Transactions on Circuits & Systems. Part I: Regular Papers . Dec2019, Vol. 66 Issue 12, p4557-4570. 14p. - Publication Year :
- 2019
-
Abstract
- In this paper we explore the effects of pole-zero compensation in the settling performance of operational transconductance amplifiers (OTAs). We carry out the analysis by exploiting a proficient technique that provides an in-depth comprehension of the time domain behavior from the contour plots of the Normalized Settling Time. Starting from the case of a single-pole amplifier, we show the conditions upon which the settling time is degraded by the slow time constant set by the pole-zero doublet. Then, we extend these results to two-pole amplifiers and provide a useful design equation. Design examples of a two-stage and a single-Miller three-stage OTAs confirm the validity of the proposed theoretical models. [ABSTRACT FROM AUTHOR]
- Subjects :
- *OPERATIONAL amplifiers
*WAGES
*TIME-domain analysis
Subjects
Details
- Language :
- English
- ISSN :
- 15498328
- Volume :
- 66
- Issue :
- 12
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Circuits & Systems. Part I: Regular Papers
- Publication Type :
- Periodical
- Accession number :
- 140253150
- Full Text :
- https://doi.org/10.1109/TCSI.2019.2933734