Newly multiplexer-based quaternary half-adder and multiplier using CNTFETs.

In recent decades, due to the problems with the use of MOSFET transistors in Nanoscale, various alternatives have been introduced. Among them, CNTFET transistors are much more attractive due to their structural and behavioral similarities to the MOSFET transistors. Besides, using binary logic has made some issues that can be solved by applying multiple-valued logic. CNTFETs are also more suitable than MOSFETs in MVL circuits since their threshold voltage can be changed through a change of nano diameter. In this article, newly quaternary half-adder and single-digit multiplier through applying CNTFET technology based on the newly decoder and multiplexer are presented. Simulation of proposed designs is done with Synopsys HSPICE using 32 nm Stanford compact model. The functional results indicate the correct and perfect operation of all designs. Also, compared to some recent designs in literature, obtained 81.34% and 74.07% improvement in PDP for the half-adder and the multiplier designed, respectively. The simulation results under various load capacitors, supply voltage, process variations, frequency, and temperature confirm the stable operation of proposed designs. [ABSTRACT FROM AUTHOR]