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Variable-Weight Block Dual-Diagonal Structure for Low-Rate QC LDPC Codes With Low Error Floors.

Authors :
Park, Hosung
Kwak, Hee-Youl
Hong, Seokbeom
No, Jong-Seon
Shin, Dong-Joon
Source :
IEEE Transactions on Communications. Mar2020, Vol. 68 Issue 3, p1344-1357. 14p.
Publication Year :
2020

Abstract

Irregular quasi-cyclic (QC) low-density parity-check (LDPC) codes with the block dual-diagonal (BDD) parity structure are widely adopted in many communication standards because the BDD structure supports an efficient encoding and many degree-2 variable nodes inside are adequate for the construction of mid- to high-rate codes. However, we observe that low-rate irregular QC LDPC codes with the BDD parity structure inherently contain too many degree-2 variable nodes and suffer from error floors in high signal-to-noise ratio (SNR) region. In this paper, a generalized BDD structure including double-weight circulants as well as circulant permutation matrices is proposed for low-rate irregular QC LDPC codes with low error floors which is achieved with a little bit giving up error performance in the waterfall region. When constructing the parity part of a code with the generalized BDD structure, the portion of double-weight circulants is variable so that the resulting LDPC code can achieve a desired degree distribution including degrees 2 and 3 while supporting the efficient encoding. We show that low-rate QC LDPC codes constructed with the proposed BDD structure have better theoretical properties and lower error floor than those with the conventional BDD structure. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00906778
Volume :
68
Issue :
3
Database :
Academic Search Index
Journal :
IEEE Transactions on Communications
Publication Type :
Academic Journal
Accession number :
143315978
Full Text :
https://doi.org/10.1109/TCOMM.2019.2957474