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Performance Modeling and Directives Optimization for High-Level Synthesis on FPGA.

Authors :
Zhao, Jieru
Feng, Liang
Sinha, Sharad
Zhang, Wei
Liang, Yun
He, Bingsheng
Source :
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems. Jul2020, Vol. 39 Issue 2, p1428-1441. 14p.
Publication Year :
2020

Abstract

High-level synthesis (HLS) relies on the use of synthesis directives to generate digital designs meeting a set of specifications. However, the selection of directives depends largely on designer experience and knowledge of the target architecture and digital design. Existing automated methods of directive selection are very limited in scope and capability to analyze complex design descriptions in high-level languages to be synthesized using HLS. This paper proposes a comprehensive model-based analysis (COMBA) framework which is capable of analyzing the effects of a multitude of directives related to functions, loops and arrays in the design description using pluggable analytical models, a recursive data collector and a metric-guided design space exploration (DSE) algorithm. COMBA reports a small average error in estimating performance when compared with HLS tools like Vivado HLS, and finds a high-performance configuration of synthesis directives within minutes. Given different resource constraints, COMBA finds configurations with higher speed-ups, compared with the state-of-the-art. Moreover, COMBA can guide the performance and area trade-off analysis. Experiments show that our DSE algorithm outperforms the conventional genetic algorithm, and COMBA efficiently finds a near-optimal configuration, which proves the efficiency of our tool for optimizing the practical HLS based designs. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
02780070
Volume :
39
Issue :
2
Database :
Academic Search Index
Journal :
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems
Publication Type :
Academic Journal
Accession number :
143857957
Full Text :
https://doi.org/10.1109/TCAD.2019.2912916