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A High-linearity Input-Buffer with high output common-mode stability for 10bit 3.2GSs ADC.
- Source :
-
Electronics Letters (Wiley-Blackwell) . 6/25/2020, Vol. 56 Issue 13, p653-655. 3p. - Publication Year :
- 2020
-
Abstract
- A high-linearity input-buffer with high output common-mode stability for 10-bit 3.2 GS/s ADC is proposed in this Letter. The buffer is mainly composed of a source follower for strong driving ability. To enhance its linearity, a feed forward signal path from input to output is proposed. A replica buffer-based common-mode feedback is designed to achieve high output common-mode stabilisation of input-buffer. The prototype is implemented in 40 nm CMOS process. The output common-mode variation is reduced from 200 to 1 mV. Input-buffer consumes 96 mW in 3.2 GHz sampling rate and achieves 69.3 dB spur-free dynamic range at 1581 MHz input frequency. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00135194
- Volume :
- 56
- Issue :
- 13
- Database :
- Academic Search Index
- Journal :
- Electronics Letters (Wiley-Blackwell)
- Publication Type :
- Academic Journal
- Accession number :
- 144243803
- Full Text :
- https://doi.org/10.1049/el.2020.0149