Cite
High speed VLSI architecture for improved region based active contour segmentation technique.
MLA
Menon, Radhika V., et al. “High Speed VLSI Architecture for Improved Region Based Active Contour Segmentation Technique.” Integration: The VLSI Journal, vol. 77, Mar. 2021, pp. 25–37. EBSCOhost, https://doi.org/10.1016/j.vlsi.2020.11.004.
APA
Menon, R. V., Kalipatnapu, S., & Chakrabarti, I. (2021). High speed VLSI architecture for improved region based active contour segmentation technique. Integration: The VLSI Journal, 77, 25–37. https://doi.org/10.1016/j.vlsi.2020.11.004
Chicago
Menon, Radhika V., Shantharam Kalipatnapu, and Indrajit Chakrabarti. 2021. “High Speed VLSI Architecture for Improved Region Based Active Contour Segmentation Technique.” Integration: The VLSI Journal 77 (March): 25–37. doi:10.1016/j.vlsi.2020.11.004.