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Effects of Back-Gate Bias on the Mobility and Reliability of Junction-Less FDSOI Transistors for 3-D Sequential Integration.
- Source :
-
IEEE Transactions on Electron Devices . Feb2021, Vol. 68 Issue 2, p464-470. 7p. - Publication Year :
- 2021
-
Abstract
- Low thermal budget junction-less transistors with back-gate are fabricated as top-tier devices for 3-D sequential integration. The impact of back-gate bias on carrier mobility and bias temperature instability (BTI) reliability is investigated. The back-gate bias is shown to modulate the carrier mobility: specifically, mobility is increased under forward back-gate bias (FBB), which is ascribed to the carrier redistribution from the front-gate interface toward back-gate interface. Regarding BTI reliability, if a back-gate bias (VBG) is applied only during ON-state and a constant front-gate stress VG is used, BTI reliability is not influenced by the applied VBG (due to its negligible impact on the front-gate oxide field, Eox). Therefore, supplying an FBB during ON-state can be used to adjust device performance—as VBG modulates the channel current through Vth and mobility—without reliability penalty. On the other hand, if the back-gate bias is applied during both ON- and OFF-states, while a constant stress Vov is maintained by adjusting the front-gate VG [i.e., VG – Vth (VBG) is kept constant under different VBG’s], the BTI reliability can be improved under FBB (due to a reduced Eox in the front-gate) without performance loss. The latter property can be used to improve the device reliability under circuit operation. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189383
- Volume :
- 68
- Issue :
- 2
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Electron Devices
- Publication Type :
- Academic Journal
- Accession number :
- 148353514
- Full Text :
- https://doi.org/10.1109/TED.2020.3041813