Cite
LAYGO: A Template-and-Grid-Based Layout Generation Engine for Advanced CMOS Technologies.
MLA
Han, Jaeduk, et al. “LAYGO: A Template-and-Grid-Based Layout Generation Engine for Advanced CMOS Technologies.” IEEE Transactions on Circuits & Systems. Part I: Regular Papers, vol. 68, no. 3, Mar. 2021, pp. 1012–22. EBSCOhost, https://doi.org/10.1109/TCSI.2020.3046524.
APA
Han, J., Bae, W., Chang, E., Wang, Z., Nikolic, B., & Alon, E. (2021). LAYGO: A Template-and-Grid-Based Layout Generation Engine for Advanced CMOS Technologies. IEEE Transactions on Circuits & Systems. Part I: Regular Papers, 68(3), 1012–1022. https://doi.org/10.1109/TCSI.2020.3046524
Chicago
Han, Jaeduk, Woorham Bae, Eric Chang, Zhongkai Wang, Borivoje Nikolic, and Elad Alon. 2021. “LAYGO: A Template-and-Grid-Based Layout Generation Engine for Advanced CMOS Technologies.” IEEE Transactions on Circuits & Systems. Part I: Regular Papers 68 (3): 1012–22. doi:10.1109/TCSI.2020.3046524.