Transistor–resistor‐stacked voltage‐mode PAM‐4 symbol generator with improved linearity.

To address the limited linearity range of current‐mode logic circuits used for four‐level pulse amplitude modulation (PAM‐4) symbol generation, a voltage‐mode, inverter‐like circuit featuring a stacked transistor–resistor structure is proposed. Simulation results have shown that the linearity of the proposed PAM‐4 circuit has been improved by 43.1%, with a modest increase of circuit area. Additionally, 20% resistance mismatch in the proposed PAM‐4 symbol generator leads to linearity degradation of <9%. [ABSTRACT FROM AUTHOR]