Back to Search
Start Over
Development of Library Components for Floating Point Processor.
- Source :
-
Journal of Ultra Scientist of Physical Sciences - Section A (Mathematics) . 2021, Vol. 33 Issue 4, p42-50. 9p. - Publication Year :
- 2021
-
Abstract
- This paper deals with development of an n-bit binary to decimal conversion, decimal to n bit binary conversion and decimal to IEEE-754 conversion for floating point arithmetic logic unit (FPALU) using VHDL. Normally most of the industries now a days are using either 4-bit conversion of ALU or 8-bit conversions of ALU, so we have generalized this, thus we need not to worry about the bit size of conversion of ALU. It has solved all the problems of 4-bit, 8-bit, 16-bit conversions of ALU's and so on. Hence, we have utilized VHSIC Hardware Description Language and Xilinx in accomplishing this task of development of conversions processes of ALU. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 2231346X
- Volume :
- 33
- Issue :
- 4
- Database :
- Academic Search Index
- Journal :
- Journal of Ultra Scientist of Physical Sciences - Section A (Mathematics)
- Publication Type :
- Academic Journal
- Accession number :
- 151323620
- Full Text :
- https://doi.org/10.22147/jusps-A/330402