Reliability of p-Type Pi-Gate Poly-Si Nanowire Channel Junctionless Accumulation-Mode FETs.

In this study, p-type Pi-gate (PG) poly-Si nanowire channel junctionless accumulation-mode (JAM) field-effect transistors (FETs) were successfully fabricated and their reliability was investigated. The reliability of these PG JAM FETs was found to be dependent on the effective channel doping concentration (Nch,eff). Through a negative gate bias stress (NGBS) test, we found that degradation in the average subthreshold swing (A.S.S.) and shift in the threshold voltage (VTH) increases as the Nch,eff of the PG JAM FETs decreases. Furthermore, the PG JAM FETs with a lower Nch,eff show the more severe rate of deterioration in the transconductance (Gm) and ON current (ION). By increasing Nch,eff to reduce the electric field (E-field) on the gate oxide and tune the carrier transport mechanism in the poly-Si nanowire channel, a better immunity against the NGBS test in the p-type PG JAM FETs can be achieved under a gate overdrive voltage (VGOD = VG – VTH = −3.5 V) to perform the NGBS test. [ABSTRACT FROM AUTHOR]