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Continuous-Time Incremental Delta-Sigma Modulators With FIR Feedback.

Authors :
Pavan, Shanthi
Halder, Tanmay
Kannan, Anand
Source :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers. Aug2021, Vol. 68 Issue 8, p3222-3231. 10p.
Publication Year :
2021

Abstract

Incremental delta-sigma data converters are useful in applications where one ADC is needed to digitize multiple channels. They can be realized using single- or multi-bit feedback. In both cases, the use of FIR feedback is beneficial in terms of improving the modulator’s linearity, reducing the quantizer’s complexity, and mitigating the effects of clock jitter (in a continuous-time realization). In the incremental mode, however, the maximum stable amplitude of the ADC is severely impacted by FIR feedback. The reasons behind this are examined, and techniques that mitigate this problem are given. Circuit simulations of an example fourth-order single-bit incremental modulator with an eight-tap FIR DAC are given to illustrate the efficacy of the theory. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
15498328
Volume :
68
Issue :
8
Database :
Academic Search Index
Journal :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers
Publication Type :
Periodical
Accession number :
153067157
Full Text :
https://doi.org/10.1109/TCSI.2021.3080379