Body Biased Sense Amplifier With Auto-Offset Mitigation for Low-Voltage SRAMs.

This paper proposes a Differential-Input Body Bias Sense Amplifier (DIBBSA) with an auto-offset mitigation feature suitable for low-voltage SRAMs where the differential bitline signals are applied to the sources as well as to the body of the critical sensing transistors. We simulated and fabricated the proposed DIBBSA architecture with various operational modes in 65-nm CMOS technology to analyze body biasing’s effectiveness in mitigating the offset. The standard deviation of offset (σOS) was measured over 5120 SAs in 10 ICs. The iso-gate area reduction in σOS for the proposed DIBBSA-FL and DIBBSA-PD modes resulted in 68.1% and 61.9% compared to conventional Current Latch SA (CLSA) and 24.1% and 18.1% compared to Voltage Latch SA (VLSA) at 0.4 V supply and 25 °C, respectively. Carried out measurements on 512 SAs in an IC show the minimum required differential input voltage across the temperature range of 0 °C to 75 °C at 0.4 V is achieved to be 48% lower compared to CLSA and 28% lower compared to VLSA by both the DIBBSA-FL and DIBBSA-PD modes. [ABSTRACT FROM AUTHOR]