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TSV-Cluster Defect Tolerance Using Tree-Based Redundancy for Yield Improvement of 3-D ICs.
- Source :
-
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems . Aug2021, Vol. 40 Issue 8, p1500-1510. 11p. - Publication Year :
- 2021
-
Abstract
- Through silicon via (TSV)-based 3-D integrated circuit (3-D IC) has several advantages like high density, high bandwidth, and low-power consumption. However, many defects in TSV are evolved during the fabrication and bonding process. In practice, faulty TSVs tend to be clustered. Employing spare TSVs (s-TSVs) is an acceptable method for repairing faulty TSVs. This article introduces a tree-based TSV repair framework to utilize hardware resources more efficiently for a higher repair rate. The proposed architecture partitions the s-TSVs for a different level of redundancy sharing. Experimental results show that the proposed design consumes 11.01 μ m2 area per signal TSV to achieve 99.99% yield for 0.05% failure rate. The proposed architecture also exhibits a higher repair rate of 73.33% for heavily clustered faults. Moreover, for the same number of functional and s-TSVs, the proposed approach reduces the delay overhead efficiently compared to the prior works. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 02780070
- Volume :
- 40
- Issue :
- 8
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems
- Publication Type :
- Academic Journal
- Accession number :
- 153068610
- Full Text :
- https://doi.org/10.1109/TCAD.2020.3021341