Controlling domain wall thermal stability switching in magnetic nanowires for storage memory nanodevices.

• The thermal stability of DW switching in nanowires is strongly dependent on the improvement of magnetic properties and nanowire geometry. • Both domain wall types (TDW and VDW) switching be more stable against nanodevice temperature, which are good candidates for storage applications. • The device temperature influences TDW velocity; it was found that TDW velocity increases by increasing the device temperature. The domain wall (DW) random switching in planar magnetic nanowires is one of the crucial problems for storage data applications. Hence, a micromagnetic simulation was used to investigate the transverse domain wall (TDW) nucleation in the thinner and narrower nanomagnetic devices and the vortex domain wall (VDW) nucleation for the thicker and wider nanowires due to the device temperature. The TDW thermal creation was examined based on magnetic properties such as uniaxial magnetic anisotropy energy (Ku) and saturation magnetization (Ms). The thermal stability of TDW switching in nanowires is strongly dependent on the improvement of magnetic properties, whereas the TDW thermal nucleation decreases by increasing Ku or Ms. In addition, the TDW and VDW thermal creation in storage nanodevices such as nanowires could be controlled by nanowire geometry manipulation like width and thickness. Reducing the nanowire width or increasing its thickness helps both domain wall types (TDW and VDW) switching to be more stable against nanodevice temperature. TDW thermal switching was found to be stable under a device temperature of up to 500 K, which is higher than the room temperature. However, the VDW shows higher thermal stability switching reaches up to 900 k, which are good candidates for storage applications. Furthermore, the TDW dynamics in nanowires were affected by device temperature, whereas the TDW moves faster by increasing nanodevice temperature. All these findings will help to maintain the storage memory in nanodevices from failure due to device temperature. [ABSTRACT FROM AUTHOR]