Back to Search
Start Over
Statistical Learning of IC Models for System-Level ESD Simulation.
- Source :
-
IEEE Transactions on Electromagnetic Compatibility . Oct2021, Vol. 63 Issue 5, Part 1, p1302-1311. 10p. - Publication Year :
- 2021
-
Abstract
- To enable accurate system-level electrostatic discharge (ESD) simulation, this article applies statistical learning to obtain I/O port models of the victim integrated circuits (ICs). A quasi-static I–V model derived using kernel regression can capture the circuit board dependency of the behavior observed at the I/O pin, regardless if there is snapback. The non-parametric kernel model can be reduced to a system-specific parametric model, which has smaller requirements for computing time and memory. In some cases, transient system-level ESD simulation may require the IC model to replicate the dynamic behavior of the nonlinear circuit. A recurrent neural network is demonstrated to be a suitable model in such cases. This article provides a detailed RNN training flow for IC pin modeling, and presents a Verilog-A implementation of the RNN for use with Simulation Program with Integrated Circuit Emphasis (SPICE)-type simulators. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189375
- Volume :
- 63
- Issue :
- 5, Part 1
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Electromagnetic Compatibility
- Publication Type :
- Academic Journal
- Accession number :
- 153733065
- Full Text :
- https://doi.org/10.1109/TEMC.2021.3076492