FPGA implementation of high-fidelity hybrid reversible watermarking algorithm.

In the digitally dominated world, to enhance the data security of digital images, this paper proposes a hybrid algorithm. The algorithm enhances quality metrics and simultaneously eliminates irreversibility and underflow-overflow errors. To enhance the important evaluation parameters, PSNR and embedding bit rate, distance between neighboring pixels is reduced by employing modified enhanced normalized mean interpolation (MENMI) in the first stage. In the second stage, improved reversible contrast mapping (IRCM) provides reversibility and error elimination by contrast improvement. The robustness of the proposed algorithm against different types of attacks is also checked and verified using MATLAB. To further validate the efficiency of the proposed algorithm in terms of power, hardware resources, and simulation time, the proposed architecture has been implemented and tested on Zynq SoC FPGA platforms. The findings demonstrate that the proposed algorithm provides an average of 20% and 18% improvements in PSNR over ENMI and ENMI-HM algorithms. The hardware implementation results signify that the proposed algorithm has low timing complexity and less power consumption at high simulation frequency than existing reversible watermarking (RW) algorithms. [ABSTRACT FROM AUTHOR]