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Evaluation of a grid‐connected reduced‐component boost multilevel inverter (BMLI) topology.

Authors :
Debela, Tamiru
Singh, Jiwanjot
Sood, Vijay K.
Source :
International Journal of Circuit Theory & Applications. Jun2022, Vol. 50 Issue 6, p2075-2107. 33p.
Publication Year :
2022

Abstract

In this paper, a reduced‐component switched‐capacitor boost multilevel inverter (SC‐BMLI) topology is proposed for off‐grid and on‐grid applications. Recently, switched‐capacitor‐based multilevel inverter (MLI) topologies have been employed to avoid the need for multiple isolated direct current (DC) sources when compared with traditional cascaded MLIs. To generate a nine‐level stepped‐up voltage across the load, the SC‐BMLI needs only eight power switches and two capacitors. To get the appropriate nine‐level switching pattern, phase disposition pulse width modulation (PD‐PWM) has been used. An extended 13‐level boost multilevel inverter (BMLI) is also discussed in this paper. The proposed topology is connected to the grid to control the grid current using synchronous reference frame‐based proportional–integral controller. A small‐signal modeling and analysis has been discussed in detail for the phase‐locked‐loop (PLL). Moreover, to prove the superior performance of the SC‐BMLI, comparative analysis with an existing single DC source MLI has also been performed. The feasibility of the 9‐level and 13‐level proposed topologies, with and without the grid‐connection, is evaluated by Matlab/Simulink simulation and verified by an experimental study using the OPAL‐RT 4510 real‐time platform. Further, prototype model of nine‐level BMLI has been developed in the laboratory using DSpace 1103 controller and results are compared with simulation. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00989886
Volume :
50
Issue :
6
Database :
Academic Search Index
Journal :
International Journal of Circuit Theory & Applications
Publication Type :
Academic Journal
Accession number :
157265668
Full Text :
https://doi.org/10.1002/cta.3253