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A Ten-Level Inverter Fed Drive Scheme with Extended Linear Modulation Range.

Authors :
Pal, Souradeep
Ghosh Majumder, Mriganka
Resalayyan, Rakesh
Gopakumar, K.
Umanand, L.
Malinowski, Mariusz
Zielinski, Dariusz
Source :
IEEE Transactions on Industrial Electronics. Dec2022, Vol. 69 Issue 12, p12261-12269. 9p.
Publication Year :
2022

Abstract

In this work, a ten-level inverter scheme is presented to extend the linear modulation range (LMR) by using a unique space vector pulsewidth modulation (SVPWM) technique, such that no lower order harmonics (such as 5th, 7th, 11th, and 13th, etc.) are present in the phase voltage as compared to six-step mode operation. The proposed scheme can increase the peak phase fundamental voltage of the inverter from 0.577 to $0.637 V_{dc}$ (maximum possible peak phase fundamental voltage of a conventional hexagonal space vector structure (SVS) voltage source inverters while operating in six-step mode), irrespective of the load power factor (p.f), where $V_{dc}$ is the dc link voltage of the inverter. The ten-level inverter structure is formed using a two-level inverter and an H-bridge (HB) in cascade from one end and a floating capacitor-based two-level inverter cascaded with an HB from the other end to drive an open-end winding induction motor (OEWIM). All the HB capacitor voltages are balanced by using space vector redundancy. The claim of balancing the capacitor voltages throughout the whole modulation range is verified experimentally in this article. Experimental results at different steady-state and transient conditions are shown to validate the proposed inverter scheme’s efficacy in increasing the LMR. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
02780046
Volume :
69
Issue :
12
Database :
Academic Search Index
Journal :
IEEE Transactions on Industrial Electronics
Publication Type :
Academic Journal
Accession number :
157958135
Full Text :
https://doi.org/10.1109/TIE.2021.3134055