DCNN search and accelerator co-design: Improve the adaptability between NAS frameworks and embedded platforms.

The gap between Neural Architecture Search (NAS) and hardware embedded accelerators degrades the deployment efficiency, due to the absent of rethinking the applicability of the searched network layer characteristics and hardware mapping. Therefore, this work proposes a novel hardware-aware NAS framework in consideration of a deduced efficiency metric. Beside, a layer adaptive scheduler and a coarse-grained reconfigurable computing architecture are developed to deploy the searched networks by selecting the most appropriate dataflow pattern layer-by-layer. Evaluation results show that the proposed NAS framework can search networks with high accuracy and low inference latency, and the proposed architecture provides power-efficiency improvement. • Bridge the applicability gap between NAS networks and hardware embedded accelerators. • A novel hardware-aware NAS framework that incorporates a deduced efficiency metric. • A layer adaptive scheduler that generates the optimal dataflow and control sequence. • A flexible coarse-grained reconfigurable architecture to deploy searched networks. [ABSTRACT FROM AUTHOR]