Cite
High-performance hardware architecture of a robust block-cipher algorithm based on different chaotic maps and DNA sequence encoding.
MLA
Amdouni, Rim, et al. “High-Performance Hardware Architecture of a Robust Block-Cipher Algorithm Based on Different Chaotic Maps and DNA Sequence Encoding.” Integration: The VLSI Journal, vol. 87, Nov. 2022, pp. 346–63. EBSCOhost, https://doi.org/10.1016/j.vlsi.2022.08.002.
APA
Amdouni, R., Gafsi, M., Guesmi, R., Hajjaji, M. A., Mtibaa, A., & Bourennane, E.-B. (2022). High-performance hardware architecture of a robust block-cipher algorithm based on different chaotic maps and DNA sequence encoding. Integration: The VLSI Journal, 87, 346–363. https://doi.org/10.1016/j.vlsi.2022.08.002
Chicago
Amdouni, Rim, Mohamed Gafsi, Ramzi Guesmi, Mohamed Ali Hajjaji, Abdellatif Mtibaa, and El-Bay Bourennane. 2022. “High-Performance Hardware Architecture of a Robust Block-Cipher Algorithm Based on Different Chaotic Maps and DNA Sequence Encoding.” Integration: The VLSI Journal 87 (November): 346–63. doi:10.1016/j.vlsi.2022.08.002.