Wafer map failure pattern recognition based on deep convolutional neural network.

• The systematic failure pattern recognition method for wafer map is explored. • A deep convolutional neural network model is established. • This model is an end-to-end 19-layer network structure. • This model can automatically extract effective classification features. • The mode can enhance the reliability and efficiency of fault pattern recognition. The objective of this paper is to propose a systematic failure pattern recognition for wafer map based on neural networks. A deep convolutional neural network (DCNN) model which includes the convolutional layer, batch normalization layer, Relu layer, maximum pooling layer, full connection layer, Softmax layer and classification layer is established for the problem of failure pattern recognition of wafer map. This model is an end-to-end 19-layer network, which can actively learn and automatically extract effective classification features. After grayscale and median filtering, the wafer map can be imported into the network for automatic failure classification without special feature extraction. On this basis, we build a dual-source DCNN structure by combining decision-level information entropy fusion. The verification results of the model in the actual wafer map database WM-811K show that the model exhibits good performance in identifying nine kinds of common failure patterns, and has advantages in identifying non-pattern wafer patterns without failure patterns. The dual-source DCNN structure has a better classification effect than the single-source DCNN structure, and the overall recognition accuracy of the dual-source DCNN structure reaches 98.34%. [ABSTRACT FROM AUTHOR]