BEAD: Bounded error approximate adder with carry and sum speculations.

This paper proposes a configurable reduced worst-case error approximate adder, named BEAD (B ounded E rror A pproximate A d der). The proposed adder is based on segmentation and carry speculation methods to cut long critical paths. Furthermore, a high accuracy speculation method is proposed to calculate the sum bits. However, the data of real-world applications is often not uniformly distributed, which leads to taking values that result in a worst-case error of the approximate adder quite frequently; therefore, considerable distortion occurs at the output. To overcome this, the carry prorogation scheme of the BEAD is such that the error distance is bounded to a given value, which makes it more accurate rather than prior works. Specifically, the BEAD offers a smaller worst-case error in addition to improved mean relative error distance. The results show between 50% and 80% smaller maximum error compared to the related works. Also, by synthesizing the different adders using a 15-nm FinFET technology, the results demonstrate that the BEAD has at least 30% area saving compared to the exact adder in the various studied configurations. The proposed adder achieves the almost lowest figure of cost (FoC) compared to state-of-the-art approximate adders. Moreover, BEAD's evaluation in image processing and DCT applications shows its great superiority over recently proposed structures. • Porposing an approximate adder based on segmentation and carry speculation methods. • Proposing a high precision speculation method to calculate the sum bits. • Bounding the error distance achieving in a smaller worst-case error. • Achieving the lowest figure of cost compared with prior approximate adders. [ABSTRACT FROM AUTHOR]