Advanced correlation method for bit position detection towards high accuracy data processing in industrial computer systems.

Modern industrial computer systems should be reliable, noise-immune, high-speed, and error-free which is difficult due to noise and industrial interferences. In the case of single additive errors, bit insertion/dropping can occur in the outputs of demodulators which implies long error packets which are hard to correct. To provide highly reliable data transmission, parameters of bit errors exemplified by the length of insertion/dropping and position of bits have to be evaluated but widely used methods for detecting and evaluating bit errors do not yield such parameters. In this paper, two new methods are proposed as a solution to this problem for the estimation of bit error parameters under single additive errors in which the difference between two positions of clock elements in the reference sequence and the received pseudorandom sequence is calculated. The new method, in addition to algorithmic effectiveness and efficiency, makes it also possible to reduce the hardware complexity of devices to be implemented for detecting and estimating the bit error parameters. Specifically, when implemented on a specialized programmable signal processor the new approach yields the computational complexity as ∼200 + 27 T clock cycles. [ABSTRACT FROM AUTHOR]