Low-fluctuation nonlinear model using incremental step pulse programming with memristive devices.

On-chip learning in neuromorphic systems, wherein both training and inference are performed on memristive synaptic devices, has been actively studied recently. However, on-chip learning is often affected by the weight-update linearity of memristive synaptic devices. Herein, we fabricated a Pt/Al 2 O 3 /TiO x /Ti/Pt stacked memristor device with excellent switching and reliability characteristics. Its weight-update linearity was analyzed via nonlinear A fitting through an on-chip simulation of the modified National Institute of Standards and Technology (MNIST) dataset. We confirmed the excellent recognition accuracy and low-fluctuation characteristics of the proposed model based on its similar characteristics to software learning. We obtained the perfect linear model and two types of nonlinear model characteristics of the memristor through incremental step pulse programming and performed an on-chip simulation. In addition, the characteristics of the measured cycle-to-cycle variation were reflected in the on-chip learning and were analyzed. We expect the low-fluctuation nonlinear model developed herein to be useful for on-chip learning owing to its excellent learning characteristics. • TiO x /Al 2 O 3 -based memristor for on-chip training of neuromorphic system • Analyzing the effect of nonlinear weight-update in memristive devices • Evaluating the performance of pattern recognition depending on linearity of weight-update • Low-fluctuation nonlinear model achieved by engineering training pulse [ABSTRACT FROM AUTHOR]