Hybrid SVC-VSC modeling approaches for hardware-in-the-loop simulation.

• Real-world HIL setups for hybrid SVC with full-bridge MMC. • Regular and small time-step simulations match exceptionally well. • Regular and small time-step simulation approaches valid in this case. • Small time-step contrivances introduce significant discrepancy from reality. • Small-time step partitioning contrivances must be considered. Hydro-Québec built two static var compensators at the 735-kV La Verendrye substation in 1985. Each has a capacity of +330/-110 Mvar to help regulate system voltage and power system dynamic. They exceeded their useful life, and their operation was becoming challenging due to the aging control technology. Spare part availability and cost were also becoming an issue. A refurbishment project was thus undertaken. Due to design constraints, a hybrid SVC was selected: traditional thyristor-switched capacitors are used, but thyristor-controlled inductors are replaced by full-bridge modular multilevel converters. Throughout the ongoing project, hardware-in-the-loop real-time simulation was used for dynamic performance testing, factory acceptance tests and pre-commissioning studies. Two modeling approaches were used to represent the hybrid SVC: conventional electromagnetic transient simulation and small time-step approach. As this paper demonstrates, both approaches are valid in this case and produce matching results if simulation contrivances are not neglected. [ABSTRACT FROM AUTHOR]