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An ultra-efficient design of fault-tolerant 3-input majority gate (FTMG) with an error probability model based on quantum-dots.

Authors :
Ahmadpour, Seyed-Sajad
Navimipour, Nima Jafari
Kassa, Sankit
Misra, Neeraj Kumar
Yalcin, Senay
Source :
Computers & Electrical Engineering. Sep2023, Vol. 110, pN.PAG-N.PAG. 1p.
Publication Year :
2023

Abstract

• Presenting the fault-tolerant majority gate using simple cells. • Verifying recommended gate by physical proof. • Presenting results in a recommended design for significant improvement in power consumption, area, and delay. • Developing an efficient one-bit QCA-based adder and 1:2 decoder based on a suggested gate. Quantum-dot cellular automata (QCA) has recently attracted significant notice thanks to their inherent ability to decrease energy dissipation and decreasing area, which is the primary need of digital circuits. However, the lack of resistance of QCA circuits under defects in previous works is a vital challenge affecting the stability of the circuit and output production. In addition, with the high defect rate in QCA, suggesting resistance and stable structures is critical. Furthermore, the 3-input majority gate is a fundamental component of QCA circuits; therefore, improving this essential gate would enable the development of fault-tolerant circuits. This paper recommends a 3-input majority gate which is 100% fault-tolerant against single-cell omission defects. Moreover, the fundamental gates are introduced based on the proposed gate. In addition, an adder and a 1:2 decoder are also designed. Using QCADesigner 2.0.3 and QCAPro software, simulations of structures and analysis of power consumption are performed. [Display omitted] [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00457906
Volume :
110
Database :
Academic Search Index
Journal :
Computers & Electrical Engineering
Publication Type :
Academic Journal
Accession number :
170745222
Full Text :
https://doi.org/10.1016/j.compeleceng.2023.108865