Scaling the Ferroelectric Field Effect Transistor.

The scaling of the ferroelectric field effect transistor (FeFET) is studied by utilizing transistor model simulation (BSIM3v3) and analytic expressions, and is compared to the scaling of the MOSFET. Two scaling approaches are discussed—‘ variable gate stack scaling,’ that requires changing the gate stack, and ‘constant gate stack scaling,’ that leaves the gate stack unchanged. The material parameters were assumed fixed throughout the scaling procedure. [ABSTRACT FROM AUTHOR]