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An Analog Floating-Gate Node for Supervised Learning.
- Source :
-
IEEE Transactions on Circuits & Systems. Part I: Regular Papers . May2005, Vol. 52 Issue 5, p834-845. 12p. - Publication Year :
- 2005
-
Abstract
- We present an improved analog floating-gate pFET synapse that implements a supervised leaning algorithm similar to the least mean square (LMS) Learning rule. Weight decay plays a key role in several learning rules; this floating-gate synapse exhibits this behavior. We examine implications of the weight decay appearing in the correlation learning rule realized in the floating-gate synapse and provide experimental data characterizing the synapse and its performance in one-input and two-input LMS networks. Analog floating-gate synapses will enable larger-scale, on-chip learning networks than previously possible. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 15498328
- Volume :
- 52
- Issue :
- 5
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Circuits & Systems. Part I: Regular Papers
- Publication Type :
- Periodical
- Accession number :
- 17227847
- Full Text :
- https://doi.org/10.1109/TCSI.2005.846663