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Experimental EMFI detection on a RISC-V core using the Trace Verifier solution.

Authors :
Zgheib, Anthony
Potin, Olivier
Rigaud, Jean-Baptiste
Dutertre, Jean-Max
Source :
Microprocessors & Microsystems. Nov2023, Vol. 103, pN.PAG-N.PAG. 1p.
Publication Year :
2023

Abstract

Physical attacks are powerful threats that can cause changes in the execution behavior of a program. Control-Flow Integrity (CFI) is used to check the program's flow execution, ensuring that it remains unaltered by these attacks. The RISC-V Trace Encoder (TE) provides valuable information about the user program's execution path, and is used as part of a CFI solution. An enhanced version of the TE specifications permits detecting intricate fault models such as the corruption of any discontinuity instruction, using an additional Trace Verifier (TV) hardware module. In this paper, we present a buffer overflow software attack simulation and experimental ElectroMagnetic Fault Injection (EMFI) attacks conducted on an Field Programmable Gate Array (FPGA) board that implements a RISC-V core linked to the enhanced TE and TV modules. Unlike existing CFI solutions, our proposed approach does not require modifications to the RISC-V compiler, user application code or the RISC-V core. The average overhead of our solution in terms of hardware area, memory and power consumption are equal to 13.6%, 3.5% and 9% respectively. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
01419331
Volume :
103
Database :
Academic Search Index
Journal :
Microprocessors & Microsystems
Publication Type :
Academic Journal
Accession number :
173943831
Full Text :
https://doi.org/10.1016/j.micpro.2023.104968