A comparative study of conventional solder bump and copper pillar bump in flip chip technology using computational fluid dynamics.

Flip chip technology is one of the common electronic packaging techniques used in the electronic industry. Before, the solder bump flip-chip bonding is used to provide the electrical connections and mechanical supports to the assembly. However, due to the fast-paced nature of technology, electronic packaging technique has become more challenging and complicated. The demand for smaller chip and interconnection joints causes the bottleneck of the conventional flip-chip technology. In order to fulfill the rising demand from the emerging market, a copper (Cu) pillar bump with a solder cap is proposed to replace the conventional solder bump. Due to the electrical and mechanical properties of Cu, it can improve the electrical performance of interconnection joint and provide mechanical support to the package. In this paper, ANSYS Fluent is used to develop the models of the conventional solder bump and Cu pillar bump. The thermal behaviour of interconnection joint during solder reflowing process is simulated. The simulation results indicate that the heat transfer of Cu pillar bumps in the reflow oven is better than conventional solder bumps. [ABSTRACT FROM AUTHOR]