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A Low Bit Instability CMOS PUF Based on Current Mirrors and WTA Cells.
- Source :
-
Journal of Electronic Testing . Dec2023, Vol. 39 Issue 5/6, p611-620. 10p. - Publication Year :
- 2023
-
Abstract
- In this work the electrical behaviour of CMOS winner take all (WTA) cells is exploited to create a novel topology for physical unclonable functions (PUF) using current mirrors. The basic cell is based on low cascode current mirrors and high-gain Sekkerkiran WTA cells. These cells are capable to select a winner neuron according to manufacture process variations. Post-layout validation of the cell was performed using Cadence Virtuoso tools with a 65nm UMC technology. The PUF energy consumption is 5.670pJ/b with native bit instability of 2.294% among 1024 readings considering temperature variations. The PUF performance is quantified with uniqueness, uniformity and reliability metrics yielding results of 49.614%, 49.662% and 97.706% respectively among 1000 considered instances. An average inter-HD=49.837%, and intra-HD=1.570% are obtained assuming temperature variation from (-20C ∼ 120C) and 300mV of supply voltage fluctuation, the key generation latency is 73ns (8b), while the true randomness of keys is proved by NIST and autocorrelation function (ACF) tests. [ABSTRACT FROM AUTHOR]
- Subjects :
- *MIRRORS
*PHYSICAL mobility
*ENERGY consumption
*MANUFACTURING processes
Subjects
Details
- Language :
- English
- ISSN :
- 09238174
- Volume :
- 39
- Issue :
- 5/6
- Database :
- Academic Search Index
- Journal :
- Journal of Electronic Testing
- Publication Type :
- Academic Journal
- Accession number :
- 174953686
- Full Text :
- https://doi.org/10.1007/s10836-023-06085-4