Highly Reconfigurable Logic‐In‐Memory Operations in Tunable Gaussian Transistors for Multifunctional Image Processing (Adv. Funct. Mater. 4/2024).

In the article "Highly Reconfigurable Logic-In-Memory Operations in Tunable Gaussian Transistors for Multifunctional Image Processing," Du Xiang, Peng Zhou, Tao Liu, and their colleagues discuss their research on reconfigurable logic gates in Gaussian transistors. They demonstrate the use of a single Gaussian transistor to achieve in situ memory of Boolean logic gates, allowing for multiple image processing tasks. The transistor consumes only 13% of the transistor consumption of silicon-based logic circuits, making it a promising device architecture for advancing parallel computing at the hardware level. The authors of the article are Weihui Sang, Du Xiang, Yi Cao, Feixia Tan, Zichao Han, Wenyu Songlu, Peng Zhou, and Tao Liu. [Extracted from the article]