CdS(In)/CZTSSe bandgap alignment engineering for performance enhancement of solar cells without ZnO layer.

Compared with the traditional structure, the new Cu 2 ZnSn(S, Se) 4 (CZTSSe) solar cell without ZnO window layer has a larger short-circuit current reduction. Due to the poor band matching, serious interface recombination exists at the CZTSSe/CdS heterojunction interface. We have designed a strategy for the preparation of CdS(In) buffer layers by In ion doping to increase the depletion layer width, enhance the carrier concentration in the CdS(In) buffer layer, and improve the energy band alignment problem at the interface of the CZTSSe/CdS heterojunction, which in turn reduces the J SC loss caused by the removal of the ZnO layer. The energy band alignment of the CZTSSe/CdS heterojunction was modulated by finely controlling the doping amount of In ions, which decreased the conduction band offset (CBO) from 0.32 eV to 0.28 eV. Good band alignment is more conducive to carrier separation and transport, and reducing the nonradiative charge recombination at the CZTSSe/CdS heterojunction interface can effectively improve the J SC. Based on the contribution of device electrical parameters to photoelectric conversion efficiency (PCE), the contributions of J SC , open-circuit voltage, and fill factor were calculated to be 107.56%, -6.89%, and -0.67%, respectively, which indicates that the method significantly improves short-circuit currents and reduces the loss of J SC due to the absence of ZnO layer. This study provides a method to achieve high-efficiency CZTSSe solar cells by optimizing the energy band matching of CZTSSe/CdS heterojunctions from 7.07% PCE in conventional cells to 9.01% PCE in novel cells. [Display omitted] • New Cu 2 ZnSn(S, Se) 4 (CZTSSe) cell structure with ZnO removal based on DMF system. • The width of depletion layer is increased by adjusting the amount of In doping in CdS. • The CdS band gap is increased, the band arrangement is adjusted, and the conduction band offset is reduced. • The short circuit current density is effectively increased by increasing the CdS carrier concentration. [ABSTRACT FROM AUTHOR]