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Multi-level storage in cleaved-gate ferroelectric FETs investigated by 3D phase-field-based quantum transport simulation.

Authors :
Jang, Jeonghwan
Lee, Hyeongu
Shin, Mincheol
Source :
Solid-State Electronics. Jun2024, Vol. 216, pN.PAG-N.PAG. 1p.
Publication Year :
2024

Abstract

In this work, we investigate the feasibility of cleaved-gate ferroelectric FET (CG-FeFET) as multi-level cell (MLC) memory devices, by conducting 3-dimensional quantum transport simulations based on time-dependent-Ginzburg–Landau equation, and the non-equilibrium Green's function method. Our results indicate that CG-FeFET can achieve multi-level operations by utilizing different thicknesses of the ferroelectric layer. We analyze the influence of electron–phonon interaction and also verify that CG-FeFET is robust to noise. Furthermore, we identify the critical role of the spacing between two ferroelectric layers in determining the memory window, considering the effects of polarization cancellation and electrostatic coupling. These findings provide valuable insights into designing stable and reliable nonvolatile memory technologies, which could offer potential solutions for high-density memory requirements. • CG-FeFETs enable multi-level memory with different ferroelectric layer thicknesses. • CG-FeFET functions as a stable memory device, maintaining polarization despite noise. • Ferroelectric layer spacing plays a crucial role in determining the memory window. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00381101
Volume :
216
Database :
Academic Search Index
Journal :
Solid-State Electronics
Publication Type :
Academic Journal
Accession number :
176809782
Full Text :
https://doi.org/10.1016/j.sse.2024.108928