基于 PCIE 的多嵌入式人工智能处理器低延迟数据交换技术.

In view of the conflict of task scheduling and data exchange between multiple embedded AI(Artificial Intelligence) processors and improving the reliability and efficiency of stack expansion of multiple AI processors, a high speed data exchange technology and data frame structure of multiple embedded AI processors with wormhole switching structure are proposed in this study. Based on the PCIE(PCI Express) high-speed data interface, the data is transmitted in the form of data unit, and the multi-weight decision algorithm is designed to avoid the conflict in data transmission and realize the concurrent multi-threading of the task.The FPGA(Field Programmable Gate Array) platform is designed and tested. The results show that the transmission bandwidth utilization efficiency of PCIE reaches more than 85%, the data exchange delay is less than 20 μs, and the average maximum delay time of interrupt task response is 8.775 μs. The technology is suitable for high-speed switching circuits with multi-processor collaboration and can be extended to hybrid PCIE and RapidIO switching circuit architectures. [ABSTRACT FROM AUTHOR]