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Applying SMART-Based Power Gating Approach in NoC System.
- Source :
-
Journal of Circuits, Systems & Computers . 7/15/2024, Vol. 33 Issue 10, p1-22. 22p. - Publication Year :
- 2024
-
Abstract
- SMART is a low-latency solution that transmits nonconflicting flits to remote routers, enabling traversal of multi-hop paths within a single cycle. It reduces packet latency but ignores high power consumption in idle components. Additionally, SMART's low latency is highly dependent on HPC Max , which represents the maximum number of hops traversed within a cycle. Therefore, this paper presents SMART-PG, a power gating method based on SMART that reduces network power consumption by shutting down idle components such as router buffers under low-load conditions. We also extend the router architecture to enable the continuous establishment of single-cycle multi-hop bypass paths. Compared to SMART routers, our method eliminates packet buffering even when a packet reaches the last router of a single-cycle multi-hop path, reducing packet latency and sensitivity to HPC Max . Finally, we propose a routing algorithm that enables efficient packet transmission in one-dimensional and two-dimensional networks even when routers are powered off. Experimental results show that our method reduces packet latency and static power consumption by an average of 7.5% and 46.4%, respectively, compared to the baseline router. Compared to SMART routers, our method demonstrates significant superiority in terms of packet latency and the impact of multi-hop length on packet latency. [ABSTRACT FROM AUTHOR]
- Subjects :
- *ROUTING algorithms
*NETWORK routers
Subjects
Details
- Language :
- English
- ISSN :
- 02181266
- Volume :
- 33
- Issue :
- 10
- Database :
- Academic Search Index
- Journal :
- Journal of Circuits, Systems & Computers
- Publication Type :
- Academic Journal
- Accession number :
- 177929243
- Full Text :
- https://doi.org/10.1142/S021812662450172X