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Implementation and validation of a dual P- and M- class compliant PMU prototype based on the delayed in-quadrature interpolated DFT.

Authors :
García-Veloso, César
Paolone, Mario
Maza-Ortega, José María
Karpilow, Alexandra
Source :
Electric Power Systems Research. Nov2024, Vol. 236, pN.PAG-N.PAG. 1p.
Publication Year :
2024

Abstract

In this paper, the design and experimental validation of a prototype phasor measurement unit (PMU) that simultaneously meets the P and M class requirements of the IEC/IEEE Std 60255-118-1-2018 are presented. The device is based on a synchrophasor estimation (SE) algorithm, previously formulated by the authors, which exploits the generation and use of a delayed in-quadrature complex signal to mitigate the self-interference of the fundamental tone. The method is deployed to a NI CompactRIO-9039 platform, requiring a total use of 19.2% flip-flops, 50.6% LUTs, 77.9% DSPs and 13.7% BRAM for a single-channel configuration and operating under a 50-fps report rate, 50 kHz sampling rate, and three nominal cycle observation windows. A PMU calibrator is used to perform a comprehensive metrological analysis of the device and verify its compliance with the standard. The results show that the prototype meets the requirements of both P and M classes with a worst-case measurement reporting latency of 36.21 ms. • Phasor measurement unit prototype simultaneously compliant with P- and M- classes. • Metrological validation according to IEC/IEEE 60255-118-1-2018 Standard. • Time-delay interpolated discrete Fourier transform algorithm. • Deployment in a field-programmable gate array based on a commercial compactRIO-9039. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
03787796
Volume :
236
Database :
Academic Search Index
Journal :
Electric Power Systems Research
Publication Type :
Academic Journal
Accession number :
179239697
Full Text :
https://doi.org/10.1016/j.epsr.2024.110777