MINIMIZATION OF CIRCUIT DESIGN USING PERMUTATION OF HAAR WAVELET SERIES.

The paper discusses complexity of circuit realization through Haar wavelet series. The efficiency in circuit synthesis using a method for minimization of the number of non-zero Haar coefficients by permutation of binary coordinates of indices of Haar functions is considered. Some applications of Haar wavelet transform and efficient ways of its calculation for logic domain are also discussed. [ABSTRACT FROM AUTHOR]