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Dynamic voltage scaling techniques for power efficient video decoding

Authors :
Lee, Ben
Nurvitadhi, Eriko
Dixit, Reshma
Yu, Chansu
Kim, Myungchul
Source :
Journal of Systems Architecture. Oct2005, Vol. 51 Issue 10/11, p633-652. 20p.
Publication Year :
2005

Abstract

Abstract: This paper presents a comparison of power-aware video decoding techniques that utilize dynamic voltage scaling (DVS). These techniques reduce the power consumption of a processor by exploiting high frame variability within a video stream. This is done through scaling of the voltage and frequency of the processor during the video decoding process. However, DVS causes frame deadline misses due to inaccuracies in decoding time predictions and granularity of processor settings used. Four techniques were simulated and compared in terms of power consumption, accuracy, and deadline misses. In addition, this paper proposes the frame-data computation aware (FDCA) technique, which is a useful power-saving technique not only for stored video but also for real-time video applications. The FDCA method is compared with the GOP, Direct, and Dynamic methods, which tend to be more suited for stored video applications. The simulation results indicated that the Dynamic per-frame technique, where the decoding time prediction adapts to the particular video being decoded, provides the most power saving with performance comparable to the ideal case. On the other hand, the FDCA method consumes more power than the Dynamic method but can be used for stored video and real-time time video scenarios without the need for any preprocessing. Our findings also indicate that, in general, DVS improves power savings, but the number of deadline misses also increase as the number of available processor settings increases. More importantly, most of these deadline misses are within 10–20% of the playout interval and thus have minimal affect on video quality. However, video clips with high variability in frame complexities combined with inaccurate decoding time predictions may degrade the video quality. Finally, our results show that a processor with 13 voltage/frequency settings is sufficient to achieve near maximum performance with the experimental environment and the video workloads we have used. [Copyright &y& Elsevier]

Details

Language :
English
ISSN :
13837621
Volume :
51
Issue :
10/11
Database :
Academic Search Index
Journal :
Journal of Systems Architecture
Publication Type :
Academic Journal
Accession number :
22389205
Full Text :
https://doi.org/10.1016/j.sysarc.2005.01.002