Low-Complexity Adaptive Equalization for High-Speed Chip-to-Chip Communication Paths by Zero-Forcing of Jitter Components.

In this letter, we show how a prefilter can be automatically adapted to open the data eye in a nonreturn to zero transmission system using only two binary samples per bit. Although the equalizer primarily aims to minimize timing jitter with a zero- forcing criterion, this equalization method also results in nearly optimum vertical eye opening, thereby causing very little overhead in complexity and power consumption. The target application is low-power high-speed serial links to transfer data between chips over a printed circuit board. [ABSTRACT FROM AUTHOR]