Back to Search
Start Over
1.2 V and 8.6 mW CMOS differential receiver front-end with 24 dB gain and -11 dBm IRCP.
- Source :
-
Electronics Letters (Institution of Engineering & Technology) . 12/7/2006, Vol. 42 Issue 25, p1449-1450. 2p. 2 Diagrams, 1 Chart, 2 Graphs. - Publication Year :
- 2006
-
Abstract
- A 60 GHz CMOS differential receiver front-end has been demonstrated by using a novel transformer-folded-cascade (Origami) circuit architecture with high gain (24 dB without buffer amplifier), high linearity (-11 dBm input referred P1 dB compression point, or IRCP), low power dissipation (4.3 mW/arm) and small die area (0.022 mm2). [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00135194
- Volume :
- 42
- Issue :
- 25
- Database :
- Academic Search Index
- Journal :
- Electronics Letters (Institution of Engineering & Technology)
- Publication Type :
- Academic Journal
- Accession number :
- 23356879
- Full Text :
- https://doi.org/10.1049/el:20063368