Leveraging Wire Properties at the Microarchitechture Level.

The authors reflect on the improvement on the speed of on-chip interconnects and communication fabrics through a heterogeneous interconnect layer of wires with differing characteristics. Various wire properties as well as the needs of data transfers should be considered for mapping activities to sets of wires. Due to the costs attached to a transmission line and optical modulators, architects must provide new ways to maximize resources and compete with regular resistance-capacitance-based wires.