Optimization of super-junction SOI-LDMOS with a step doping surface-implanted layer.

A super-junction (SJ) SOI-LDMOS with a step doping surface-implanted n-type layer is proposed and optimized which allows high breakdown voltage (BV) and low on-resistance (Ron). The proposed structure overcomes the field effect action in conventional SJ SOI-LDMOS devices, thus achieving the charge compensation between the n and p pillars as well as a near uniform electric field distribution in the drift region in the off-state. The surface-implanted layer also provides a low current path in the on-state. In addition, the analysis result of surface doping distribution is obtained which is a power tool for device designers to provide accurate first-order design schemes. The simulation results show that an increase in the off-state BV by 55% and a reduction of the specific on-resistance by 37.4% are obtained for the proposed device when compared with those of the conventional one. [ABSTRACT FROM AUTHOR]